Designed the main architecture of ASIC IC PCF8583 by Philips Semiconductors. It involved writing time and calendar properties sent by I2C master onto an I2C based slave RAM.
A technical paper titled “Datapath Verification via Word-Level E-Graph Rewriting” was published by researchers at Intel Corporation and Imperial College London. “Formal verification of datapath ...
Designed to be easy to use by eliminating the learning curve normally associated with formal register transfer level (RTL) design verification technology, BlackTie is offered as a functional checker ...
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