TechRepublic

Low Power State Retention Technique for CMOS VLSI Design

Mobile computing and mobile communication applications which are powered by battery, the battery life is a major concern. Leakage power dissipation is critical in VLSI circuits as the battery leaks ...
Design-Reuse

VLSI Design: Future of Wireless Communication

As a technology enthusiast, I have always been fascinated by the rapid advancements in the field of wireless communication. The ability to connect with people and devices wirelessly has revolutionized ...
Design-Reuse

Nordic VLSI launches the nRF2402, a highly integrated component for wireless communication manufactured in an ultra modern 0.18um CMOS process

The nRF2402 is a highly integrated component for wireless communication manufactured in an ultra modern 0.18um CMOS process. The entire transmitter including all inductors and filters is integrated in ...
Electronics Weekly

Cadence offers academia PDK for open source 130nm SkyWater process

A PDK for the SkyWater open-source 130 nm process will be available in the Cadence VLSI (very large-scale integration) Fundamentals Education Kit. The kit teaches students how theories and concepts ...
New Electronics

Cadence open-source PDK and reference design now available for SkyWater's 130nm process

SkyWater Technology has announced that a new SkyWater open-source 130 nm process design kit (PDK) from Cadence Design Systems, will be available in the Cadence VLSI (very large-scale integration) ...
TechRepublic

Low Power VLSI CMOS Design by DCG Technique

The demand for power-sensitive design has grown significantly in recent years due to tremendous growth in portable applications. Consequently, the need for power efficient design techniques has grown ...