EDN

The next RISC-V processor frontier: AI

The RISC-V Summit North America, held on 22-23 October 2025 in Santa Clara, California, showcased the latest CPU cores featuring new vector processors, high-speed interfaces, and peripheral subsystems ...
EDN

AI is stress-testing processor architectures and RISC-V fits the moment

RISC-V’s expanding role in AI is not a rejection of incumbent architectures, which continue to deliver performance and ...
VentureBeat

Synopsys expands processor designs with RISC-V ARC-V Family

Join our daily and weekly newsletters for the latest updates and exclusive content on industry-leading AI coverage. Learn More Synopsys announced its plans for expanding its processor intellectual ...
Business Wire

Frontgrade Gaisler Leads the Way in RISC-V Processor Development for Space Applications

GOTHENBURG, Sweden--(BUSINESS WIRE)--Under a contract with the European Space Agency (ESA), Frontgrade Gaisler is designing a new RISC-V processor tailored to meet the requirements of microcontrollers ...
Geeky Gadgets

RISC-V Revolution: How Open Processors Are Changing the CPU Market

RISC-V, an open instruction set architecture (ISA), is reshaping the global computing landscape. Unlike proprietary ISAs such as x86, widely used by Intel and AMD, or ARM, which dominates mobile and ...
Semiconductor Engineering

Increasing Design Flexibility With RISC-V-Based Processor IP

The semiconductor industry increasingly needs more flexible and scalable processor architectures, driving the growing adoption of RISC-V. Originally developed at the University of California, Berkeley ...