Commercial power analysis tools have been available now for over 10 years, operating at the gate and transistor level of abstraction. For analog, mixed-signal, and custom designs, transistor-level ...

Fifteen years ago, designers were buzzing about a new design approach: Register Transfer Level (RTL) Design. There was a fundamental change underway in how chip designs were created and implemented.

With the increasing size and complexity of FPGA devices, there is a need for more efficient verification methods. Timing simulation can be the most revealing verification method; however, it is often ...

SANTA CLARA, Calif. – July 7, 2004 - Tensilica, Inc. today announced that it has achieved a major design automation breakthrough – the automated design of optimized configurable processors from ...